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cursedth

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1 November, 2013 16:18:25

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Hey Kaalus.

While using the 4-Bit-Counter and it's overflow.
I was creating a 2 displayed counter to count from 00 to FF and also back to 00 from FF.

The second 4-bit-counter, X0 has AND-gates on both the + and - input.
The overflow of the first, 0X ,connected to both the AND-gates.
Two buttons on the first 4-b-counter, 0X, for + and - are respectively connected to their correspondng AND-gates on the second counter.

So if there would be an overflow pressing the +button, they together, with the AND-gate, would get two signals from the +button and the overflow,  and would increase the second counter with 1.
And if there would be an overflow pressing the -button counting down, F to 0, the second counter would receive an signal on the -side.

Thing is if the first counter counts down from F to E the overflow also gives a signal. ???

Thought you should know.
Regards Cursedth.
 
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cursedth

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#1 [url]

2 November, 2013 16:02:25

WorldFile for Bugreport: BugreportCurse

Thanks for looking in on it again.
ps In this example it also did it when counting up??

Also added two examples for merging wires. The one with the two random generators shows it best.

Here is the dropbox file I mentioned:

BugreportCurse.scworld-file-link.

 

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kaalus

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3 November, 2013 12:56:54

I can see what your problem is now. You have to remember each device introduces a small delay, this is the cause of your problems.

This is what is happening in your case when it works:

1. When you press the button, the first counter overflows from F to 0
2. At the same time, the AND gate receives the signal from the button, but because the overflow has not reached it yet (counter delay), the second counter does not yet count up
3. In the next tick, the overflow signal is generated in the counter and reaches the AND gate on the other input. Fortunately, the button's signal is still there (button's pulse lasts about 10 ticks). The AND gate produces the output and the second counter increments.

As you can see, the reason it works at all is that the button's pulse is longer than 1 tick.

Now what happens when you press the button again, and it doesn't work:

1. You press the button again, the first counter goes from 0 to 1. But the overflow signal is still there - counter delay! It will only be cleared in the next tick.
2. The signal from the button reaches the AND gate. Because the overflow signal is still there from the counter, AND gate produces an output
3. The second counter increments, even though it shouldn't

The reason it doesn't work is the delay introduced by the counter, which causes the overflow signal to stay on for too long.

The problem you are having is very general and well understood in the world of electronics. It's called "race condition". It occurs whenever a circuit is vulnerable to small differences in signal timing (i.e. which signal comes first) - that's why it's called race.

The general solution to this is to introduce a clock signal that gates the signals at appropriate places and ensures that small timing differences do not matter.

This however would be an overkill in your situation, because your circuit is very simple. In case of simple circuits, you just have to ensure that the delays are correct. For example by adding 1 tick of delay between the buttons and the AND gates: 

image

(OR gates are useful for 1 tick delays)

With this modification, your counters work, because signals from the buttons and overflow outputs reach the next counter at the same time.

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